 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| Preliminary Technical Data FEATURES 460 kbps data rate 1 Tx and 1 Rx Meets EIA-232E specifications 0.1 F charge pump capacitors ESD protection to IEC1000-4-2 (801.2) on CMOS and RS-232 I/Os 8 kV: contact discharge 15 kV: air gap discharge 3.3 V, Single Channel RS-232 Line Driver/Receiver ADM3101E FUNCTIONAL BLOCK DIAGRAMS +3.3V Input 0.1F 10V + C1+ C1C2+ C2T IN +3.3V TO +6.6V Voltage Doubler +6.6V TO -6.6V Voltage Inverter Vcc V+ V+ + C3 0.1F 6.3V C4 0.1F 10V + C5 0.1F 0.1F + 10V CMOS Input T1 T OUT EIA/TIA-232 Output ADM3101E APPLICATIONS General-purpose RS-232 data link Portable instruments Handsets Industrial/Telecom Diagonictics Ports CMOS R OUT Output R1 R IN EIA/TIA-232 Input* GND * Internal 5k Pull-down resistor on the RS-232 input GENERAL DESCRIPTION The ADM3101E transceiver is a high speed, single-channel RS232/V.28 interface devices that operate from a single 3.3 V power supply. Low power consumption make it ideal for battery-powered portable instruments. The ADM3101E conforms to the EIA-232E and CCITT V.28 specifications and operates at data rates up to 460 kbps. All RS-232 (TOUT and RIN) and CMOS (TIN and ROUT) inputs and outputs are protected against electrostatic discharges (up to 15 kV ESD Protection). This ensures compliance with IEC 1000-4-2 requirements. This device is ideally suited for operation in electrically harsh environments or where RS-232 cables are frequently being plugged/unplugged with the 15kV ESD protection of the ADM3101E's I/O pins. Emissions are also controlled to within very strict limits. CMOS technology is used to keep the power dissipation to an absolute minimum, allowing maximum battery life in portable applications. Four external 0.1 F charge pump capacitors are used for the voltage doubler/inverter permitting operation from a single 3.3 V supply. The ADM3101E is available in a 12-lead LFCSP. Rev. PrD Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Figure 1. ADM3101E Functional Block Diagram One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2006 Analog Devices, Inc. All rights reserved. ADM3101E Table of Contents Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 ESD Caution.................................................................................. 4 Pin Configurations and Function Descriptions ........................... 5 Typical Performance Characteristics ............................................. 6 General Description ......................................................................... 8 Circuit Description....................................................................... 8 Charge Pump DC-DC Voltage Converter ............................ 8 Transmitter (Driver) Section .................................................. 8 Preliminary Technical Data Receiver Section ........................................................................8 CMOS Input Voltage Thresholds ............................................8 ESD Protection on RS-232 and CMOS I/O pins ..................9 High Baud Rate..............................................................................9 Outline Dimensions ....................................................................... 10 Ordering Guide .......................................................................... 10 REVISION HISTORY Rev. PrD | Page 2 of 10 Preliminary Technical Data SPECIFICATIONS VCC = 3.3 V 0.3 V, C1-C4 = 0.1 F. All specifications TMIN to TMAX, unless otherwise noted. Table 1. Parameter DC CHARACTERISTICS Operating Voltage Range VCC Power Supply Current LOGIC Input Logic Threshold Low, VINL Input Logic Threshold High, VINH Input Logic Threshold Low, VINL Input Logic Threshold High, VINH CMOS Output Voltage Low, VOL CMOS Output Voltage High, VOH Logic Pull-Up Current RS-232 RECEIVER EIA-232 Input Voltage Range EIA-232 Input Threshold Low EIA-232 Input Threshold High EIA-232 Input Threshold High EIA-232 Input Hysteresis EIA-232 Input Resistance RS-232 TRANSMITTER Output Voltage Swing (RS-232) Output Voltage Swing (RS-562) Transmitter Output Resistance RS-232 Output Short Circuit Current TIMING CHARACTERISTICS Maximum Data Rate Receiver Propagation Delay TPHL TPLH Transmitter Propagation Delay Receiver Output Enable Time Receiver Output Disable Time Transmitter Skew Receiver Skew Transition Region Slew Rate ESD Protection (RS-232 and CMOS I/O Pins) 15 15 8 kV kV kV Human Body Model IEC 1000-4-2 Air Discharge IEC 1000-4-2 Air Discharge Min 3.0 Typ 3.3 1.0 3 Max 5.5 2 5 0.6 1.4 0.8 2.0 0.4 VCC - 0.6 5 -30 0.6 10 +30 1.2 1.6 TBD 0.4 5 5.2 2.4 3.0 7 Unit V mA mA V V V V V V A V V V V V k V V mA Test Conditions/Comments ADM3101E No load RL = 3 k to GND TIN TIN TIN, VCC = 5.0V 0.5V TIN, VCC = 5.0V 0.5V IOUT = 1.6 mA IOUT = -1 mA TIN = GND to VCC Guaranteed by Design VCC = 3.0V to 5.5V VCC = 5.0V 0.5V 3 5.0 TBD 300 VCC = 3.3V to 5.5V. All transmitter outputs loaded with 3 k to ground. VCC = 3.0 V VCC = 0 V, VOUT = 2 V 15 460 0.4 0.4 300 200 200 30 300 10 kbps s s s ns ns ns ns V/s VCC = 3.3 V, RL = 3 k to 7 k, CL = 50 pF to 1000 pF. RL = 3 k, CL = 1000 pF 5.5 30 Guaranteed by Design from +3 V to -3 V or -3 V to +3 V, VCC = +3.3 V, RL = 3 k, CL = 1000 pF, TA = 25C Rev. PrD | Page 3 of 10 ADM3101E ABSOLUTE MAXIMUM RATINGS TA = 25C, unless otherwise noted. Table 2. Parameter VCC V+ V- Input Voltages TIN RIN Output Voltages TOUT ROUT Short Circuit Duration TOUT Power Dissipation Power Dissipation CP-12 (Derate 6 mW/C above 50C) JA, Thermal Impedance Operating Temperature Range Industrial (A Version) Storage Temperature Range Lead-Free Temperature (Soldering, 10 s) Rating -0.3 V to +6 V (VCC - 0.3 V) to +14 V +0.3 V to -14 V -0.3 V to (V+, +0.3 V) 30 V 15 V -0.3 V to (VCC + 0.3 V) Continuous TBDmW 48.7C/W -40C to +85C -65C to +150C 260C Preliminary Technical Data This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. PrD | Page 4 of 10 Preliminary Technical Data PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS ADM3101E 12 11 10 1 2 3 ADM3101E TOP VIEW (NOT TO SCALE) 9 8 7 V- 4 5 6 Figure 2. ADM3101E Pin Configuration Table 3. Pin Function Descriptions Mnemonic VCC V+ V- GND C1+, C1- C2+, C2- TIN TOUT RIN ROUT Function Power Supply Input. 3.0 V to 5.5 V. Internally Generated Positive Supply (+6 V Nominal). Internally Generated Negative Supply (-6 V Nominal). Ground Pin. Must be connected to 0 V. External Capacitor 1 is connected between these pins. 0.1 F capacitor is recommended but larger capacitors up to 47 F may be used. External Capacitor 2 is connected between these pins. 0.1 F capacitor is recommended but larger capacitors up to 47 F may be used. Transmitter (Driver) Input. This input accepts TTL/CMOS levels. Transmitter (Driver) Output. This outputs RS-232 signal levels (typically 6 V). Receiver Input. This input accepts RS-232 signal levels. An internal 5 k pull-down resistor to GND is connected on the input. Receiver Output. This outputs CMOS output logic levels. Rev. PrD | Page 5 of 10 ADM3101E TYPICAL PERFORMANCE CHARACTERISTICS Preliminary Technical Data Figure 3. Transmitter Output Voltage High/Low vs. Load Capacitance @ 460 kbps Figure 6. Charge Pump V+, V- vs. Load Current Figure 4. Transmitter Output Voltage vs. VCC, RL = 3k Figure 7. Charge Pump Impedance vs. VCC Figure 5. Transmitter Output Voltage Low/High vs. Load Figure 8. Power Supply Current vs. Load Capacitance Rev. PrD | Page 6 of 10 Preliminary Technical Data ADM3101E Figure 9. 460 kbps Data Transmission Figure 10. TIN Voltage Threshold vs. Vcc Rev. PrD | Page 7 of 10 ADM3101E GENERAL DESCRIPTION The ADM3101E is a single channel RS-232 line driver/receiver. Step-up voltage converters coupled with level shifting transmitters and receivers allow RS-232 levels to be developed while operating from a single 3.3 V supply. CMOS technology is used to keep the power dissipation to an absolute minimum, allowing maximum battery life in portable applications. Preliminary Technical Data Figure 12. Charge Pump Voltage Doubler CIRCUIT DESCRIPTION The internal circuitry consists of the following main sections: * * * A charge pump voltage converter A 3.3 V logic to EIA-232 transmitter A EIA-232 to 3.3 V logic receiver Figure 13. Charge Pump Voltage Inverter Charge Pump DC-DC Voltage Converter The charge pump voltage converter consists of a 200 kHz oscillator and a switching matrix. The converter generates a 6.6 V supply from the input 3.3 V level. This is done in two stages by using a switched capacitor technique as illustrated in Figure 12 and Figure 13. First, the 3.3 V input supply is doubled to 6.6 V by using capacitor C1 as the charge storage element. The +6.6 V level is then inverted to generate -6.6 V using C2 as the storage element. C3 is shown connected between V+ and VCC, but is equally effective if connected between V+ and GND. Capacitors C3 and C4 are used to reduce the output ripple. Their values are not critical and can be increased, if desired. Capacitor C3 is shown connected between V+ and VCC. It is also acceptable to connect this capacitor between V+ and GND. If desired, larger capacitors (up to 10 F) can be used for capacitors C1-C4. +3.3V Input 0.1F 10V + Transmitter (Driver) Section The driver convert the 3.3 V logic input levels into RS-232 output levels. With VCC = 3.3 V and driving an RS-232 load, the output voltage swing is typically 6 V. The TIN pin has internally a weak pull-up which allows it to be driven by an open drain output, but the maximum operating datarate is reduced when the TIN pin is been driven by a open drain pin. Receiver Section The receiver is an inverting level-shifters that accept RS-232 input level and translate it into a 3.3 V logic output level. The input has an internal 5 k pull-down resistors to ground and is also protected against overvoltages of up to 30 V. An unconnected input is pulled to 0 V by the internal 5 k pulldown resistor. This, therefore, results in a Logic 1 output level for an unconnected input or for an input connected to GND. The receiver has a Schmitt-trigger input with a hysteresis level of 0.4 V. This ensures error-free reception for both a noisy input and for an input with slow transition times. C1+ C1C2+ C2T IN +3.3V TO +6.6V Voltage Doubler +6.6V TO -6.6V Voltage Inverter Vcc V+ V+ + C3 0.1F 6.3V C4 0.1F 10V + C5 0.1F 0.1F + 10V CMOS Input CMOS Input Voltage Thresholds The ADM3101E CMOS input and output pins (TIN and ROUT) are designed to interface with 1.8V logic thresholds when the ADM3101E's Vcc = 3.3V. The ADM3101E CMOS input and output pins (TIN and ROUT) are designed to interface with TTL/CMOS logic thresholds when the ADM3101E's Vcc = 5V. T1 T OUT EIA/TIA-232 Output ADM3101E CMOS R OUT Output R1 R IN EIA/TIA-232 Input* GND * Internal 5k Pull-down resistor on the RS-232 input Figure 11. ADM3101E Typical Operating Circuit Rev. PrD | Page 8 of 10 Preliminary Technical Data ESD Protection on RS-232 and CMOS I/O pins All RS-232 (TOUT and RIN) and CMOS (TIN and ROUT) inputs and outputs are protected against electrostatic discharges (up to 15 kV). This ensures compliance with IEC 1000-4-2 requirements. ADM3101E HIGH BAUD RATE The ADM3101E features high slew rates permitting data transmission at rates well in excess of the EIA/RS-232 specifications. The RS-232 voltage levels are maintained at data rates up to 460 kbps even under worst case loading conditions, when TIN is been driven by a push-pull output. This allows high speed data links between two terminals, or indeed it is suitable for the new generation ISDN modem standards that requires data rates of 230 kbps. The slew rate is internally controlled to less than 30 V/s to minimize EMI interference. Rev. PrD | Page 9 of 10 ADM3101E OUTLINE DIMENSIONS Preliminary Technical Data Figure 14. 12-Lead Frame Chip Scale package [LFCSP] (CP-12)--Dimensions shown in millimeters ORDERING GUIDE Model ADM3101EACPZ1 Temperature Range -40C to +85C Package Options1 CP-12 1 Z = Pb Free (c) 2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR06378-0-9/06(PrD) Rev. PrD | Page 10 of 10 |
Price & Availability of ADM3101E
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |